A circuit for driving a brushless motor employs a method of supplying a PWM (pulse width modulation) signal from the outside as an instruction signal for controlling an rpm of the motor to a control circuit. Because a device, to which the brushless motor is mounted, includes a microprocessor, which can produce a PWM signal as a control instruction signal with ease, so that an additional circuit such as a DA converter is not needed. This method thus has become widespread rapidly in these years. When this method is used, in order to detect a duty of a PWM signal supplied to the control circuit, the number of pulses (H1) during a high level of the PWM signal is divided in an arithmetic circuit by the number of pulses (W1) in one cycle of the PWM signal, as shown in equation 1.
                    pwmdty        =                              H            ⁢                                                  ⁢            1                                W            ⁢                                                  ⁢            1                                              (        1        )            
The arithmetic circuit thus needs a division circuit, so that the circuitry becomes complicated and bulky. To overcome this problem, a circuit for calculating a PWM duty without using the division calculation has been invented. This idea is disclosed in, e.g. cited patent reference 1.
FIG. 11 shows an instance of the foregoing idea. First counter 260 (16-bit) counts a digital signal which detects a duty ratio, and pulses of a first clock signal are added to “n” cycle period of the digital signal, and the number of the pulses of the first clock signal is counted for generating a data signal. Then 8-bit shift circuit 261 shifts the data signal generated by first counter 260 to 8-bit data and detects a data signal of higher order 8-bit, then first adder circuit 262 integrates the lower order 8-bit of the data signal. When the integration reaches a data signal of higher order 8-bit, a carry occurs. A corrected data formed by integrating the carry supplied from first adder circuit 262 into the higher order 8-bit data signal and the data signal obtained from second counter 266 are compared for obtaining a second clock signal. This second clock signal counts the number of pulses added to third counter 268 during the low level (level L) of “n” cycle period of the digital signal, thereby obtaining a duty ratio.
The foregoing method allows the signal of lower order 8-bit to be valid, so that a duty ratio of a digital signal can be detected with little error and without a cumbersome division circuit. However, an employment of the foregoing mechanism to an rpm control circuit, which controls the rpm of a brushless motor, needs a conversion circuit discussed below:
A PWM control circuit controls an rpm of a brushless motor in response to a duty of a PWM input signal. This PWM control circuit divides a PWM input signal into an accelerating region and a decelerating region at the threshold of duty 50%, i.e. the accelerating region covers the region over the duty 50% while the decelerating region covers the region the duty less than 50%. Thus the PWM control circuit determines whether or not the duty is over 50%, and detects a deviation (%) with respect to the duty 50%, then converts the PWM input signal into a signal (PWM driving signal) for driving the brushless motor.
A relation between a PWM input signal and a PWM driving signal is described with reference to FIG. 12. In FIG. 12, the region covering the duty over 50% of the PWM input signal is an accelerating region, and in this region the PWM driving signal needs to be converted from duty 0 (zero) % to 100%. To the contrary, in the region covering the duty less than 50%, namely, in a decelerating region, the PWM driving signal needs to be converted from duty 0% to −100% following an exciting procedure for conducting reverse-brake operation if a quick deceleration is needed.
Because of the situation discussed above, to control the rpm of the brushless motor by using the detected PWM duty data, the following two additional circuits are needed, i.e. a circuit for determining whether or not the duty is over 50% and a subtracting circuit for finding deviation data with respect to duty 50%. As a result, the structure becomes complicated.
In FIG. 11, duty-ratio data is obtained after the number of bits (8 bits) of third counter 268 passes, so that a time delay occurs between an input digital signal and the duty-ratio data. Thus the time delay becomes longer at a lower frequency of the input digital signal as well as a greater number of bits (e.g. 16 bits) of third counter 268, so that the time delay adversely influences the control over the rpm of the brushless motor.
When a PWM input signal has the same PWM frequency as a PWM driving signal, e.g. when PWM input signal has 500 Hz and PWM driving signal for the brushless motor has also 500 Hz, then the brushless motor generates sound having the frequency of 500 Hz, which is within the audible range and becomes offensive to ears. To overcome this problem, the PWM frequency needs to be converted to, e.g. 20 kHz higher than the audible range, for outputting a PWM driving signal. This preparation also makes the circuit structure complicated.
Cited Patent Reference 1: Unexamined Japanese Patent Publication No. 2002-238280.